Set Up and Operation
1.4.7.2
ISOLATED VOLTAGE FEEDBACK
There are many different ways that the two isolated voltage feedback signals can be
provided. Clearly, the DC level must be correctly maintained while still giving sufficient
bandwidth. The bandwidth is especially important for the |VAC| signal in order to
ensure low harmonics are produced by the active PFC. Power supply consumption
should also be as low as possible. All the above requirements can be met by the use
of an inexpensive PIC ? microcontroller, along with two additional low current
optocouplers.
In this case, an 8-pin PIC12C671 microcontroller was chosen, as it has the necessary
ADC on-board and is low cost. Full advantage could be taken of the on-board 4 MHz
RC clock. Three different methods for representing the magnitude of the two signals
were considered. In all cases, only two optocouplers were required.
? A serial communication interface – A simplified two-wire SPI (Clock and Data
Out). It would operate as a master with the dsPIC device as the slave. Given the
PIC12C671 does not have a hardware SPI module, the interface would be
reproduced in software. The code latency was to be used for ADC acquisition and
conversion timing. This was the method chosen and the code is given in
Appendix B along with a diagram showing the transmission data cycle.
Note:
The clock and data signals for the SPI interface are inverted due to the
opto-isolators. The user code should account for this by sampling the data
on the falling clock edge and inverting the received data.
? Pulse width modulation at constant frequency – This was rejected partly due to
concerns over distortion of the pulse width by economic optocouplers. Also, it was
thought that it would not be possible to provide the required bandwidth, while
maintaining the 8-bit resolution of the captured data, given the lack of a hardware
PWM module.
? Frequency modulation – This was considered given that the pulse distortion by
the optocouplers ceased to be an issue. However, concerns about how the band-
width of the feedback could be maintained over the 8-bit data range led to its
rejection.
The actual hardware is described below:
? U34 – The PIC12C671. Note that the PIC12C671 is reset whenever the RESET
line is asserted, as this pin has been configured as the MCLR. This allows correct
synchronization of the SPI with the dsPIC device to be established. The RESET
line must be asserted for a minimum pulse width of 2 μ s.
? R12, R15, R122 – These form a potential divider so that the maximum expected
voltage on |VAC|_SENSE is 4.5V.
? C43 – This acts to smooth out any noise spikes on the |VAC|_SENSE_POINT in
combination with R12, R15 and R122.
? R10, R13, R14, R140, R141 – These form a potential divider so that the maximum
expected voltage on BUS_SENSE is 4.5V. Note that HALF_BUS_SENSE is used
by the sensorless position detection comparators (see Section 1.4.7.3 “Inverter
? C57 – This acts to filter out any noise spikes on the DC bus voltage sensing
circuit.
? D40, D42 – Clamping diodes to protect the PIC12C671 inputs.
? 2003 Microchip Technology Inc.
DS70096A-page 25
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